Vulnerabilities > Qemu > Qemu > 2.5.1.1
| DATE | CVE | VULNERABILITY TITLE | RISK |
|---|---|---|---|
| 2020-10-16 | CVE-2020-24352 | Improper Restriction of Operations within the Bounds of a Memory Buffer vulnerability in Qemu An issue was discovered in QEMU through 5.1.0. | 2.1 |
| 2020-10-06 | CVE-2020-25743 | NULL Pointer Dereference vulnerability in multiple products hw/ide/pci.c in QEMU before 5.1.1 can trigger a NULL pointer dereference because it lacks a pointer check before an ide_cancel_dma_sync call. | 2.1 |
| 2020-10-06 | CVE-2020-25742 | NULL Pointer Dereference vulnerability in Qemu pci_change_irq_level in hw/pci/pci.c in QEMU before 5.1.1 has a NULL pointer dereference because pci_get_bus() might not return a valid pointer. | 2.1 |
| 2020-08-31 | CVE-2020-14364 | Out-of-bounds Write vulnerability in multiple products An out-of-bounds read/write access flaw was found in the USB emulator of the QEMU in versions before 5.2.0. | 5.0 |
| 2020-08-31 | CVE-2020-12829 | Integer Overflow or Wraparound vulnerability in multiple products In QEMU through 5.0.0, an integer overflow was found in the SM501 display driver implementation. | 2.1 |
| 2020-08-27 | CVE-2020-14415 | Divide By Zero vulnerability in multiple products oss_write in audio/ossaudio.c in QEMU before 5.0.0 mishandles a buffer position. | 3.3 |
| 2020-08-11 | CVE-2020-16092 | Reachable Assertion vulnerability in multiple products In QEMU through 5.0.0, an assertion failure can occur in the network packet processing. | 3.8 |
| 2020-07-28 | CVE-2020-15863 | Out-of-bounds Write vulnerability in multiple products hw/net/xgmac.c in the XGMAC Ethernet controller in QEMU before 07-20-2020 has a buffer overflow. | 5.3 |
| 2020-07-02 | CVE-2020-15469 | NULL Pointer Dereference vulnerability in multiple products In QEMU 4.2.0, a MemoryRegionOps object may lack read/write callback methods, leading to a NULL pointer dereference. | 2.1 |
| 2020-06-04 | CVE-2020-13791 | Out-of-bounds Read vulnerability in Qemu hw/pci/pci.c in QEMU 4.2.0 allows guest OS users to trigger an out-of-bounds access by providing an address near the end of the PCI configuration space. | 2.1 |