Security News > 2021 > April > Friday Squid Blogging: 500-Million-Year-Old Cephalopod
As the article notes Intel have an overly rich CISC system at the CPU ISA level, but in reality dropped the internal CISC von Numann architecture for a RISC Harvard architecture a very long time ago.
The "Go faster stripes" mentality is what has given us the joys of those low level hardware faults like Meltdown and Spector that to solve require not just major changes in the low level "Register Transfer Language"(RTL) that underlies even the most basic of microcode, it more importantly takes ten's of percents of ISA level performance away from the user.
Due to cache issues they may well not, that is just reversing their order in the code has side effects at the cache level.
Likewise the issues that alow "Reach around attacks" like RowHammer and similar to work at the high level software levels on the computing stack, but act on hardware way below the CPU level, that the underlying mechanisms have been known about from before the days of the 1802 processor back in the first half of the 1970's.
As I found out with the 1802 it was not just "Cosmic radiation" that caused problems, you could also make active attacks using not just EM Carrier Wave(CW) signals but those that were effectively Amplitude Modulated(AM) by amongst other things Pulse Modulation such that you could reliably and repeatedly cause a change in behaviour of the CPU. So I'm fully expecting quite a few more attacks at below not just the CPU ISA level, but at further down the computing stack.
Currently we have no commercial computing systems that can defend against bubbling up attacks, which is why they are going to become bigger and bigger news as people start to investigate below the CPU ISA level in the computing stack.